Over the past decade, packaging becomes increasingly important for microelectronic devices. As the density of semiconductor devices is increasing, the requirement of compactness and reduced-cost for packaging is more demanding.
FIGS. 1A-1D show the conventional packaging process of semiconductor device. Those figures demonstrate the semiconductor device using COB (chip on board) package on PCB or BGA, wherein the semiconductor chips are directly attached on substrate and subjected to wire bonding process.
As shown in FIG. 1A, a substrate 1 is prepared. Then an already-cut die 2 is mounted on and adhered to the substrate 1 by adhesive paste such as silver epoxy. The bounded die is then subjected to a curing process, as shown in FIG. 1B.
Afterward, the die 2 is subjected to a wire bonding process with metal wire 3, as shown in FIG. 1C. The resulting structure is then encapsulated with resin 4 to protect the die 2 therein, as shown in FIG. 1D.
FIGS. 2A-2D show another conventional packaging process of semiconductor device. Those figures demonstrate the semiconductor device using COB (chip on board) package on PCB or BGA, wherein a dam grid is formed on the substrate, and then the semiconductor chip is attached on substrate and subjected to wire bonding process.
As shown in FIG. 2A, a substrate 11 is prepared, wherein a dam grid 10 is formed on the substrate 11 by pressing. Then an already-cut die 12 is mounted on and adhered to the substrate 11 by adhesive paste such as silver epoxy. The bounded die is then subjected to a curing process, as shown in FIG. 2B.
Afterward, the die 12 is subjected to a wire bonding process with metal wire 13, as shown in FIG. 2C. The resulting structure is covered with a transparent lid 14 such as glass lid to seal the package, as shown in FIG. 1D.
However, the above-mentioned COB package employed in PCB or BGA has some drawbacks. For examples, the cost of molding compound is high; moreover, the direct pressing process on substrate is a high-temperature and high-pressure process, which might degrade the reliability of the package.
It is one object of the present invention to provide a semiconductor packaging technology, which does not involve a high-temperature and high-pressure process, therefore, the problems of damage of PCB or substrate and short circuit can be prevented, moreover, the yield and the reliability can be enhanced.
It is another object of the present invention to provide a semiconductor packaging technology, which can reduce the cost of molding die and package, moreover, the die can be attached on substrate with more flexibility.
To achieve above objects, the present invention provide a semiconductor packaging method comprising following processes
forming an array-typed dam on a substrate or PCB;
mounting a already-cut die to each dam grid, and adhering the die to the dam grid;
wire-bonding the mounted die;
applying adhesive paste to top surface of each dam, and covering the resultant structure with a transparent lid to ensure the hermeticity of the package.
Moreover, a solder ball array can be formed on the back of the substrate and then the resulting structure is cut into a plurality of single units.
The present invention forms the dam structure necessary for the package by an off-line process, and then attaches the dam structure on the substrate. Therefore, the problems of damage of PCB or substrate and short circuit can be prevented, moreover, the yield and the reliability can be enhanced.
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which: